This invention relates generally to power semiconductor systems, and more specifically to power semiconductor devices for limiting current surges on power bus lines.
In telecommunication, network and computer systems, it is often desired to plug or unplug electronic circuit cards from their power source without removing power from the system. This is typically referred to as “hot swapping” or “hot plugging”. During hot swapping events, it is desired to minimize power bus transients, and at the same time, protect both the card and the system from transients that may occur despite precautions.
To protect cards and systems from transients and faults, other circuits typically are inserted in the power lines to detect faults and respond in a way that prevents faulty operation or damage. In a typical configuration, a power semiconductor device, such as a power MOSFET, is coupled into the power line in series with load capacitors and circuits on the circuit card. Control circuitry is included to sense voltage and current in order to detect faults in the system. The control circuitry can then turn on or turn off the power semiconductor device in response to the sensed signals, which protects the system. Such circuits are commonly referred to as “hot swap” or “hot plug” circuits or devices.
Once a card is plugged into the system and its power MOSFET device is fully turned on, power bus current passes through the power MOSFET and into a load device. If no faults occur, the power MOSFET may remain in an on state for an extended period of time. In this case, it is important that the power MOSFET device have a low drain to source resistance (i.e., on resistance (RDSon)) to minimize power dissipation and voltage drop on the power bus.
In addition, it is important that the protective circuitry provide a very low current limit to prevent a large inrush current, which can occur when a card is plugged into a system. The current limit is used to more slowly charge load capacitances when the card is first plugged in, and to prevent large inrush currents in the event of a shorted load after the card is plugged in.
Present power MOSFET designs use dense cell geometries to achieve low RDSon, which results in a device with a very large gain (Gm). In order to limit current on a device with a very large gain, gate voltage (Vgs) must be reduced to level that is very near threshold voltage (Vth). When Vgs is close to Vth, drain saturation current (IDSAT) increases with temperature (i.e., IDSAT has a positive temperature coefficient). This effect can result in “hot spot” formation and thermal runaway, which can lead to device and ultimately system failure.
Accordingly, a need exists for a power switching device that has low on resistance and low current limit capability (i.e., low IDSAT), and that is more robust against the effects of hot spot formation and thermal runaway.